Silicon Labs /Series1 /EFR32MG14P /EFR32MG14P732F256GM48 /CMU /LFRCLKSEL

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Interpret as LFRCLKSEL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)LFR

LFR=DISABLED

Description

Low Frequency R Clock Select Register

Fields

LFR

Clock Select for LFR

0 (DISABLED): LFRCLK is disabled

1 (LFRCO): LFRCO selected as LFRCLK

2 (LFXO): LFXO selected as LFRCLK

4 (ULFRCO): ULFRCO selected as LFRCLK

Links

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